#include "XN297L.h"
#include "NUC029xAN.h"

const uint8_t TX_ADDRESS_DEF[5] = {0xCC,0xCC,0xCC,0xCC,0xCC};

void SPI_WW(uint8_t R_REG)
{
    uint8_t  i;
   for(i = 0; i < 8; i++)
    {
        SCK_LOW;
        if(R_REG & 0x80)
        {
            SPI_DATA_HIGH;
        }
        else
        {
            SPI_DATA_LOW;
        }
        R_REG = R_REG << 1;
      
        SCK_HIGH;
    }
   SCK_LOW;

}

void RF_WriteReg( uint8_t reg,  uint8_t wdata)
{
    CSN_LOW;
    SPI_WW(reg);
    SPI_WW(wdata);
    CSN_HIGH;
}

void RF_WriteBuf( uint8_t reg, uint8_t *pBuf, uint8_t length)
{
     uint8_t j;
    CSN_LOW;
    j = 0;
    SPI_WW(reg);
    for(j = 0;j < length; j++)
    {
        SPI_WW(pBuf[j]);
    }
    j = 0;
    CSN_HIGH;
}

void SPI_WR(uint8_t R_REG)
{
    uint8_t  i;
   for(i = 0; i < 8; i++)
    {
        SCK_LOW;
        if(R_REG & 0x80)
        {
            SPI_DATA_HIGH;
        }
        else
        {
            SPI_DATA_LOW;
        }
        R_REG = R_REG << 1;
      
        SCK_HIGH;
    }
   SPI_DATA_INPUT_MODE;
   SCK_LOW;

}

uint8_t ucSPI_Read(void)
{
    uint8_t i,data;  
    data = 0; 
    for(i = 0; i < 8; i++)
    {
        SCK_LOW;
        data = data << 1;
          
        SCK_HIGH;
        if(SPI_DATA_STATUS)
        {
          data |= 0x01;
        
        }
    }
    SCK_LOW;
    return data;
}

 uint8_t        ucRF_ReadReg( uint8_t reg)
{
     uint8_t data;
    
    CSN_LOW;
    SPI_WR(reg);
    data = ucSPI_Read();
    SPI_DATA_OUTPUT_MODE;
    CSN_HIGH;
    
    return data;
}

void RF_ReadBuf( uint8_t reg, unsigned char *pBuf,  uint8_t length)
{
    uint8_t byte_ctr;

    CSN_LOW;                    		                               			
    SPI_WR(reg);       		                                                		
    for(byte_ctr=0;byte_ctr<length;byte_ctr++)
    	pBuf[byte_ctr] = ucSPI_Read();
    SPI_DATA_OUTPUT_MODE;
    CSN_HIGH;                                                                   		
}

void RF_TxMode(void)
{
    CE_LOW;
    RF_WriteReg(W_REGISTER + CONFIG,  0X8E);
    CLK_SysTickDelay(10000);
    CE_HIGH;
    CLK_SysTickDelay(10000);
}

void RF_TxData( uint8_t *ucPayload,  uint8_t length)
{
 if(0==ucRF_GetStatus())                                                                                                                                               
   {
    RF_WriteBuf(W_TX_PAYLOAD, ucPayload, length); 
                                                    			
    CLK_SysTickDelay(2000);  
    
    ucRF_ReadReg(CONFIG);
     CLK_SysTickDelay(2000);  
   }
}

void RF_Init(void)
{

   uint8_t  BB_cal_data[]    = { 0x12,0xec,0x6f,0xa1,0x46}; 
   uint8_t  RF_cal_data[]    = {0xF6,0x37,0x5d};
   uint8_t  RF_cal2_data[]   = {0xd5,0x21,0xeb,0x2c,0x5a,0x40};
   uint8_t  Dem_cal_data[]   = {0x1f};  
   uint8_t  Dem_cal2_data[]  = {0x0b,0xdf,0x02};

    RF_WriteReg(RST_FSPI, 0x5A);
    RF_WriteReg(RST_FSPI, 0XA5);
	RF_WriteReg(W_REGISTER +FEATURE, 0x27);
   
    CE_LOW;                    
    RF_WriteReg(FLUSH_TX, 0);									// CLEAR TXFIFO		    			 
    RF_WriteReg(FLUSH_RX, 0);									// CLEAR  RXFIFO
    RF_WriteReg(W_REGISTER + STATUS, 0x70);							// CLEAR  STATUS	
    RF_WriteReg(W_REGISTER + EN_RXADDR, 0x01);							// Enable Pipe0
    RF_WriteReg(W_REGISTER + SETUP_AW,  0x03);							// address witdth is 5 bytes
    RF_WriteReg(W_REGISTER + RF_CH,     DEFAULT_CHANNEL);                                       // 2478M HZ
    RF_WriteReg(W_REGISTER + RX_PW_P0,  PAYLOAD_WIDTH);						// 8 bytes
    RF_WriteBuf(W_REGISTER + TX_ADDR,   ( uint8_t*)TX_ADDRESS_DEF, sizeof(TX_ADDRESS_DEF));	// Writes TX_Address to PN006
    RF_WriteBuf(W_REGISTER + RX_ADDR_P0,( uint8_t*)TX_ADDRESS_DEF, sizeof(TX_ADDRESS_DEF));	// RX_Addr0 same as TX_Adr for Auto.Ack   
    RF_WriteBuf(W_REGISTER + BB_CAL,    BB_cal_data,  sizeof(BB_cal_data));
    RF_WriteBuf(W_REGISTER + RF_CAL2,   RF_cal2_data, sizeof(RF_cal2_data));
    RF_WriteBuf(W_REGISTER + DEM_CAL,   Dem_cal_data, sizeof(Dem_cal_data));
    RF_WriteBuf(W_REGISTER + RF_CAL,    RF_cal_data,  sizeof(RF_cal_data));
    RF_WriteBuf(W_REGISTER + DEM_CAL2,  Dem_cal2_data,sizeof(Dem_cal2_data));
    RF_WriteReg(W_REGISTER + DYNPD, 0x00);					
    RF_WriteReg(W_REGISTER + RF_SETUP,  RF_POWER);						// 13DBM  		
     
#if(TRANSMIT_TYPE == TRANS_ENHANCE_MODE)      
    RF_WriteReg(W_REGISTER + SETUP_RETR,0x03);							//  3 retrans... 	
    RF_WriteReg(W_REGISTER + EN_AA,     0x01);							// Enable Auto.Ack:Pipe0  	
#elif(TRANSMIT_TYPE == TRANS_BURST_MODE)                                                                
    RF_WriteReg(W_REGISTER + SETUP_RETR,0x00);							// Disable retrans... 	
    RF_WriteReg(W_REGISTER + EN_AA,     0x00);							// Disable AutoAck 
#endif

}

uint8_t ucRF_GetStatus(void)
{
    return ucRF_ReadReg(STATUS)&0x70;
}
